dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 383

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

SUB
Operation:
D - S →
D - S →
D - S →
Description: Subtract the source register from the destination register and store the result in the destination (D). If
Usage:
Example:
Explanation of Example:
Note:
Freescale Semiconductor
Before Execution
A2
X0
0
D
D
D
the destination is a 36-bit accumulator, 16-bit source registers are first sign extended internally and
concatenated with 16 zero bits to form a 36-bit operand. When the destination is X0, Y0, or Y1, 16-bit
subtraction is performed. In this case, if the source operand is one of the accumulators; the FF1 portion
(properly sign extended) is used in the 16-bit subtraction (the FF2 and FF0 portions are ignored).
This instruction can be used for both integer and fractional two’s-complement data.
SUB
Prior to execution, the 16-bit X0 register contains the value $0003 and the 36-bit A accumulator con-
tains the value $0:0058:1234. The SUB instruction automatically appends the 16-bit value in the X0
register with 16 LS zeros, sign extends the resulting 32-bit long word to 36 bits, and subtracts the result
from the 36-bit A accumulator. Thus, 16-bit operands are always subtracted from the MSP of A or B
(A1 or B1) with the results correctly extending into the extension register (A2 or B2).
Operands of 16 bits can be subtracted from the LSP of A or B (A0 or B0). This can be achieved using
the Y register. When loading the 16-bit operand into Y0 and loading Y1 with the sign extension of Y0,
a 32-bit word is formed. Executing a SUB Y,A or SUB Y,B instruction generates the desired opera-
tion. Similarly, the second accumulator can also be used for the source operand.
Bit C is set correctly using word or long word source operands if the extension register of the destina-
tion accumulator (A2 or B2) contains sign extension from bit 31 of the destination accumulator (A or
B). C is always set correctly using accumulator source operands.
(single parallel move)
(dual parallel read)
0058
0003
A1
X0,A
1234
A0
X:(R2)+N,X0
Instruction Set Details
Subtract
Assembler Syntax:
SUB
SUB
SUB
After Execution
A2
X0
0
S,D
S,D
S,D
; 16-bit subtract, load X0,
;
0055
3456
A1
update R2
(single parallel move)
(dual parallel read)
1234
A0
SUB
A-153