dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 419

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

B.1.11
The matrix multiplications are for square NxN matrices (all fractional elements are in row-major format).
Figure B-8 gives a graphical overview and memory map of an [NxN][NxN] matrix multiply.
Freescale Semiconductor
; This algorithm utilizes hardware nesting looping; user care necessary on next loop.
; The main assumption: no hardware loops active when this function is called.
; FOR FRACTIONAL ELEMENTS, THE FOLLOWING TWO INSTRUCTIONS ARE REQUIRED
opt
MOVE #A_Matrx11,R3
MOVE R3,Y1
MOVE #B_Matrx11,R0
MOVE R0,R1
MOVE #C_Matrx11,R2
MOVE #ROW_SIZE11,B
MOVE B,N
DO
PUSH LC
PUSH LA
DO
MOVE Y1,R3
MOVE R1,R0
CLR
MOVE
REP
MAC
aN1 .. aNk .. aNN
a11 .. a1k .. a1N
ak1 .. akk .. akN
.
.
[NxN][NxN] Matrix Multiply (for fractional elements)
cc
N,Traverse_A_rows_1
N,Traverse_B_columns_1
A
#ROW_SIZE11-1
Y0,X0,A
m
cN1 .. cNk .. cNN
c11 .. c1k .. c1N
ck1 .. ckk .. ckN
X:(R0)+N,Y0
X:(R0)+N,Y0
.
.
Figure B-8. [NxN][NxN] Matrix Multiply
X
=
DSC Benchmarks
X:(R3)+,X0
X:(R3)+,X0
bN1 .. bNk .. bNN
b11 .. b1k .. b1N
bk1 .. bkk .. bkN
.
.
; 2
; 1
; 2
; 1
; 2
; 1
; 1
; 2
; 2
; 2
; 2
; 1
; 1
; 1
; 1
; 1
; 1
2
1
2
1
2
1
1
3
2
2
3
1
1
1
1
3
1
point to A[1,1]
save pntr to A[1,1]
point to B[1,1]
save pntr to B[1,1]
point to C[1,1] (result)
number of rows (N x N)
number of repetitions N
do all rows
save LC to allow nesting
save LA to allow nesting
compute a row in C
1st element in A row
1st element in B column
clr sum, get elemnt in A
element in B, next B row
sum products except last
traverse B rows, A col
r3
r0
r2
X memory
aN1
a11
b11
a1k
ak1
b1k
c11
.
.
.
.
.
AA0086
B-23