dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 86

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Address Generation Unit
4.2
The DSP56800 instruction set contains a full set of operand addressing modes, optimized for
high-performance signal processing as well as efficient controller code. All address calculations are
performed in the address generation unit to minimize execution time.
Addressing modes specify where the operand or operands for an instruction can be found — whether an
immediate value, located in a register, or in memory — and provide the exact address of the operand(s).
The addressing modes are grouped into four categories:
An effective address in an instruction will specify an addressing mode (that is, where the operands can be
found), and for some addressing modes the effective address will further specify an address register that
points to a location in memory, how the address is calculated, and how the register is updated.
These addressing modes are referred to extensively in Section 6.6.4, “Instruction Summary Tables,” on
page 6-17.
Several of the examples in the following sections demonstrate the use of assembler forcing operators.
These can be used in an instruction to force a desired addressing mode, as shown in Table 4-1.
Other assembler forcing operators are available for jump and branch instructions, as shown in Table 4-2.
4-6
Register direct — directly references the processor registers as operands
Address register indirect — uses an address register as a pointer to reference a location in memory
as an operand
Immediate — the operand is contained as a value within the instruction itself
Absolute — uses an address contained within the instruction to reference a location in memory as
an operand
Addressing Modes
Force immediate short data
Force 16-bit immediate data
Force absolute short address
Force I/O short address
Force 16-bit absolute address
Force short offset
Force 16-bit offset
Force 7-bit relative branch offset
Force 16-bit absolute jump address
Force 16-bit absolute loop address
Desired Action
Desired Action
Table 4-2. Jump and Branch Forcing Operators
Table 4-1. Addressing Mode Forcing Operators
DSP56800 Family Manual
Forcing Operator Syntax
Forcing Operator Syntax
X:(Rn+>xxxx)
X:(SP-<xx)
X:>xxxx
X:<<xx
#>xxxx
X:<xx
>xxxx
>xxxx
#<xx
<xx
X:(R0+>$03)
X:(SP-<$02)
Freescale Semiconductor
X:<<$FFE3
<LABEL1
>LABEL5
>LABEL4
Example
Example
X:<$02
X:>$02
#<$07
#>$07

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