dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 247

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

The symbols used in the tables are summarized in Table A-10.
The assumptions for calculating execution time are the following:
Freescale Semiconductor
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Table A-17 on page A-21 gives the number of additional clock cycles (if any) for the RTS or RTI
instruction.
Table A-18 on page A-21 gives the number of additional clock cycles (if any) for the TSTW
instruction.
Table A-19 on page A-21 gives the number of additional instruction words (if any) and additional
clock cycles (if any) for each effective addressing mode.
Table A-20 on page A-22 gives the number of additional clock cycles (if any) for external data,
external program, and external I/O memory accesses.
All instruction cycles are counted in oscillator clock cycles. Two oscillator clock cycles are
equivalent to one instruction cycle.
The instruction fetch pipeline is full.
There is no contention for instruction fetches. Thus, external program instruction fetches are
assumed not to have to contend with external data memory accesses.
There are no wait states for instruction fetches done sequentially (as for non-change-of-flow
instructions), but they are taken into account for change-of-flow instructions that flush the pipeline,
such as JMP, Jcc, RTS, and so on.
aio
ap
ax
axx
ea
jx
mv
mvb
mvc
mvm
mvp
mvs
rx
wp
wx
Symbol
Time required to access an I/O operand
Time required to access a P memory operand
Time required to access an X memory operand
Time required to access X memory operands for double read
Time or number of words required for an effective address
Time required to execute part of a jump-type instruction
Time or number of words required for a move-type operation
Time required to execute part of a bit-manipulation instruction
Time required to execute part of a MOVEC instruction
Time required to execute part of a MOVEM instruction
Time required to execute part of a MOVEP instruction
Time required to execute part of a MOVES instruction
Time required to execute part of an RTS instruction
Number of wait states used in accessing external P memory
Number of wait states used in accessing external X memory
Table A-10. Instruction Timing Symbols
Instruction Set Details
Description
A-17