dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 374

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

RND
Operation:
D + r →
D + r →
Description: Round the 36-bit or 32-bit value in the specified destination operand (D). If the destination is an accu-
Example:
Explanation of Example:
Condition Codes Affected:
Note:
A-144
I
II
III
Before Execution
Before Execution
Before Execution
A2
A2
A2
D
D
5
0
0
mulator, store the result in the EXT:MSP portions of the accumulator and clear the LSP. This instruc-
tion uses the rounding technique that is selected by the R bit in the OMR. When the R bit is cleared
(default mode), convergent rounding is selected; when the R bit is set, two’s-complement rounding is
selected. Refer to Section 3.5, “Rounding,” on page 3-30 for more information about the rounding
modes.
RND
Prior to execution, the 36-bit A accumulator contains the value $5:1236:789A for Case I, the value
$0:1236:8000 for Case II and the value $0:1235:8000 for Case III. Execution of the RND A instruction
rounds the value in the A accumulator into the MSP of the A accumulator (A1) and then zeros the LSP
of the A accumulator (A0). The example is given assuming that the convergent rounding is selected.
Case II is the special case that distinguishes convergent rounding from the two’s-complement round-
ing, since it clears the LSB of the MSP after the rounding operation is performed.
If the CC bit is set and bit 31 of the result is set, then N is set. If the CC bit is set and bits 31–0 of the
result equal zero, then Z is set. The rest of the bits are unaffected by the setting of the CC bit.
15
LF
(single parallel move)
14
*
1236
1236
1235
A1
A1
A1
SZ — Set according to the standard definition of the SZ bit (parallel move)
L
E
U
N
Z
V
13
*
— Set if limiting (parallel move) or overflow has occurred in result
— Set if the extension portion of accumulator result is in use
— Set according to the standard definition of the U bit
— Set if bit 35 of accumulator result is set
— Set if result equals zero
— Set if overflow has occurred in accumulator result
A
12
*
MR
11
*
Round Accumulator
789A
8000
8000
DSP56800 Family Manual
10
A0
A0
A0
*
I1
9
Assembler Syntax:
RND
RND
I0
8
SZ
7
After Execution
After Execution
After Execution
L
6
A2
A2
A2
5
0
0
E
5
D
D
; round A accumulator into
;
U
4
CCR
1236
1236
1236
A2:A1, zero A0
N
3
A1
A1
A1
Z
2
V
(single parallel move)
1
Freescale Semiconductor
0
C
0000
0000
0000
A0
A0
A0
RND