dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 144

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Instruction Set Introduction
Note that for the ANDC instruction, a one’s-complement of the mask value is used when remapping to the
BFCLR instruction. For the NOTC instruction, all bits in the 16-bit mask are set to one.
In Example 6-2, an immediate value is logically ORed with a location in memory.
The assembler translates this instruction into
operation. If the assembled code is later disassembled, it will appear as a BFSET instruction.
6.5.2
Because the LSLL instruction operates identically to an arithmetic left shift, this instruction is actually
assembled as an ASLL instruction. When the assembler encounters the LSLL mnemonic, an ASLL
instruction is assembled. See Table 6-10.
6.5.3
Because the ASL instruction operates similarly to a logical left shift when executed on the Y1, Y0, and X0
registers, this instruction is actually assembled as an LSL instruction. Note that while the result in the
destination register will be the same as if an arithmetic shift had been performed, condition codes are
calculated based on a logic shift and might differ from the expected result. See Table 6-11.
The ASL instruction is not aliased to LSL when the register specified is one of the accumulator registers.
6-12
LSLL Alias
ASL Alias
Operation
Operation
ORC
LSLL
ASL
Instruction
Table 6-9. Aliases for Logical Instructions with Immediate Data
Desired
NOTC
EORC
#$00FF,X:$0400
Example 6-2. Logical OR with a Data Memory Location
Y1,X0,DD
Y0,X0,DD
Y1,Y0,DD
Y0,Y0,DD
A1,Y0,DD
B1,Y1,DD
Operands
Operands
Table 6-11. ASL Instruction Remapping
DD
Table 6-10. LSLL Instruction Alias
#xxxx,DST
Operands
DSP56800 Family Manual
DST
Multi-bit logical left shift.
First register is the value to be shifted, second register is the
shift amount (uses 4 LSBs).
Use ASLL when left shifting is desired on one of the two
accumulators.
Arithmetic left shift (assembled as LSL DD)
BFSET #$00FF,X:$400
; Set all bits of lower byte in X:$0400
Instruction
Remapped
BFCHG
BFCHG
Comments
Comments
, which performs the same
#$FFFF,DST
#xxxx,DST
Operands
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