dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 279

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

BFCLR
Operation:
0 →(<bit field> of destination)
0 →(<bit field> of destination)
Description: Test all selected bits of the destination operand. If all selected bits are set, C is set; otherwise, C is
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Note:
Freescale Semiconductor
cleared. Then clear the selected bits and store the result in the destination memory location. The bits
to be tested are selected by a 16-bit immediate value in which every bit set is to be tested and cleared.
This instruction performs a read-modify-write operation on the destination and requires two destina-
tion accesses.
This instruction is very useful in performing I/O and flag bit manipulation.
BFCLR
Prior to execution, the 16-bit X memory location X:$FFE2 contains the value $7F95. Execution of the
instruction tests the state of the bits 4, 8, and 9 in X:$FFE2; clears C (because not all of the bits spec-
ified in the immediate mask were set); and then clears the bits.
For destination operand SR:
For other destination operands:
If all bits in the mask are set to zero, the destination is unchanged, and the C bit is set. Refer to
Table A-9 on page A-13 when the destination is the SR register.
Before Execution
X:$FFE2
LF
15
SR
14
*
?
L
C
13
*
— Cleared as defined in the field and if specified in the field
— Set if data limiting occurred during 36-bit source move
— Set if all bits specified by the mask are set
#$0310,X:<<$FFE2
12
7F95
0001
*
MR
Cleared if not all bits specified by the mask are set
Test Bit Field and Clear
11
*
10
*
Instruction Set Details
I1
9
Assembler Syntax:
BFCLR
BFCLR
I0
8
SZ
7
; test and clear bits 4, 8, and 9 in
; an on-chip peripheral register
L
6
5
E
After Execution
X:$FFE2
#iiii,X:<ea>
#iiii,D
U
4
CCR
SR
N
3
2
Z
7C85
0000
V
1
C
0
BFCLR
A-49