dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 327

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MACR
Operation:
+ D + S1 * S2 + r → D
Description: Multiply the two signed 16-bit source operands, add or subtract the 32-bit fractional product to or from
Usage:
Example:
Explanation of Example:
Freescale Semiconductor
D + S1 * S2 + r → D (single parallel move)
D + S1 * S2 + r → D (dual parallel read)
Before Execution
A2
0
the third operand, and round and store the result in the destination (D). Both source operands must be
located in the FF1 portion of an accumulator or in X0, Y0, or Y1. The fractional product is first sign
extended before the 36-bit addition is performed, followed by the rounding operation. If the destination
is one of the 16-bit registers, it is first sign extended internally and concatenated with 16 zero bits to
form a 36-bit operand before being added to the fractional product. The addition is then followed by
the rounding operation, and the high-order 16 bits of the result are then stored. This instruction uses
the rounding technique that is selected by the R bit in the OMR. When the R bit is cleared (default
mode), convergent rounding is selected; when the R bit is set, two’s-complement rounding is selected.
Refer to Section 3.5, “Rounding,” on page 3-30 for more information about the rounding modes. Note
that the rounding operation always zeros the LSP of the result if the destination (D) is an accumulator.
This instruction is used for the multiplication, accumulation, and rounding of fractional data.
MACR
Prior to execution, the 16-bit X0 register contains the value $4000, the 16-bit Y1 register contains the
value $C000, and the 36-bit A accumulator contains the value $0:0003:8000. Execution of the
MACR -X0,Y1,A instruction multiplies the 16-bit signed value in the X0 register by the 16-bit
signed value in Y1 and subtracts the resulting 32-bit product from the 36-bit A accumulator, rounds
the result, and stores the result ($0:2004:0000) into the A accumulator. In this example, the default
rounding (convergent rounding) is performed.
0003
A1
X0
Y1
Multiply-Accumulate and Round
-X0,Y1,A
C000
8000
4000
A0
Instruction Set Details
Assembler Syntax:
MACR
MACR
MACR
After Execution
A2
0
(+)S1,S2,D
S1,S2,D
S1,S2,D
2004
A1
X0
Y1
(single parallel move)
(dual parallel read)
C000
0000
4000
A0
MACR
A-97

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