dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 181

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
7.4
The WAIT instruction brings the processor into the wait processing state, which is one of two low
power-consumption states. Asserting any valid interrupt request higher than the current processing level
(as defined by the I1 and I0 bits in the status register) releases the DSC from the wait state. In the wait state
the internal clock is disabled from all internal circuitry except the internal peripherals. All internal
processing is halted until an unmasked interrupt occurs or until the DSC is reset.
Freescale Semiconductor
i = Interrupt
ii = Interrupt Instruction Word
n = Normal Instruction Word
i% = Interrupt Rejected
Interrupt Control Cycle 1
Interrupt Control Cycle 2
Fetch
Decode
Execute
Instruction Cycle Count
ii= Interrupt Instruction
n= Normal Instruction
Interrupt Synchronized
Wait Processing State
and Recognized
Re-enabled
as Pending
Interrupts
REP
1
i
Interrupt Synchronized and
n1 REP m
Figure 7-7. Interrupting a REP Instruction
Program
Fetches
(a) Instruction Fetches from Memory
Recognized as Pending
Main
REP
Interrupts and the Processing States
n2
n3
n4
n5
n6
i%
n2
2
(b) Program Controller Pipeline
REP
REP
3
REP
REP
4
REP
n3
n2
5
Repeat m
Times
n2
n2
6
n2
n2
7
i
n2
n2
8
i
Interrupts Re-enabled
ii1
ii2
Interrupt
Service Routine Fetches
(From Between P:$0000 and
P:$003F)
JSR
n2
ii1
9
Instruction n2
Replaced Per
The REP Instruction
n2
Wait Processing State
JSR
JSR
10
ii2
n2
n2
JSR
JSR
n2
n4
11
AA0071
JSR
JSR
n5
12
7-17

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