dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 273

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

ASRAC
Operation:
S1 >> S2 + D → D
Description: Arithmetically shift the first 16-bit source operand (S1) to the right by the value contained in the lowest
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Instruction Fields:
Timing:
Memory:
Freescale Semiconductor
Operation
ASRAC
Before Execution
A2
0
4 bits of the second source operand (S2), and accumulate the result with the value in the destination
(D). Operand S1 is internally sign extended and concatenated with 16 zero bits to form a 36-bit value
before the shift operation. The result is not affected by the state of the saturation bit (SA).
This instruction is typically used for multi-precision arithmetic right shifts.
ASRAC
Prior to execution, the Y1 register contains the value to be shifted ($C003), the X0 register contains
the amount by which to shift ($0004). The ASRAC instruction arithmetically shifts the value $C003
four bits to the right and accumulates this result with the value already in the destination register A.
Since the destination is an accumulator, the extension word (A2) is filled with sign extension.
See Section 3.6.2, “36-Bit Destinations — CC Bit Set,” and Section 3.6.4, “20-Bit Destinations — CC
Bit Set,” for the case when the CC bit is set.
2 oscillator clock cycles
1 program word
LF
15
0000
A1
14
*
Arithmetic Right Shift with Accumulate
N
Z
13
*
Y1
X0
Operands
— Set if bit 35 of accumulator result is set
— Set if result equals zero
Y1,X0,F
Y0,X0,F
Y1,Y0,F
Y0,Y0,F
A1,Y0,F
B1,Y1,F
Y1,X0,A
12
*
MR
11
*
C003
0099
0004
A0
10
*
Instruction Set Details
I1
9
C
2
Assembler Syntax:
ASRAC
I0
8
W
1
SZ
7
After Execution
; right shift Y1 by X0 and
;
Arithmetic word shifting with accumulation
A2
6
L
F
5
E
accumulate in A
S1,S2,D
FC00
U
4
CCR
A1
N
3
Y1
X0
Z
Comments
2
V
1
C003
3099
0004
A0
C
0
ASRAC
A-43