dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 398

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
B.1
The following source code lists all the “defines” for the benchmarks. The addresses used in the definition
section are selected arbitrarily to demonstrate the algorithm. Whenever possible, the long addressing mode
will be used in order to generate the worst case scenario. The location of the peripheral space and the
individual I/O assignments are dependent on chip implementation—I/O short addressing mode assumed.
B-2
; Global Definition for Loop Count
N_
; Peripheral addr are dependent on device implementation (assumes short addr mode)
InputValue
Output
; Section B.1.1 (correlation)
A_Vec1
B_Vec1
LMS Adaptive Filter: Double Precision
LMS Adaptive Filter: Double Precision Delayed
Vector Multiply-Accumulate
Energy in a Signal
[3x3][3x1] Matrix Multiply
[NxN][NxN] Matrix Multiply
N Point 3x3 2-D FIR Convolution
Sine Wave Generation: Double Integration Technique
Sine Wave Generation: Second Order Oscillator
Array Search: Index of the Highest Signed Value
Array Search: Index of the Highest Positive Value
Proportional Integrator Differentiator (PID) Algorithm
Autocorrelation Algorithm
Benchmark Code
page 132
opt cc
EQU
EQU
EQU
EQU
EQU
100
$FFC8
$FFC9
$0200
$0100
Benchmark
Table B-1. Benchmark Summary (Continued)
DSP56800 Family Manual
; loop count in various benchmarks
; I/O peripheral address used for input
; I/O peripheral address used for output
; initial address of vector A
; initial address of vector B
((p + 1)
Execution Time
N
2N + 5NTaps
13N
3
+ 8N
(# Icyc)
5NTaps
2
2
2N
1N
2N
5N
4N
2N
21
(N - p / 2))
9
+ 14N
2
+12N
Freescale Semiconductor
(# Words)
Program
Length
35
30
14
21
26
39
13
16
14
15
19
7
9

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