dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 115

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

In Example 4-12 there is a pipeline dependency since the SP register written in the first instruction is used
by the immediately following JSR instruction to store the subroutine return address. The stack pointer will
not be updated with the immediate value in this case. This sequence may be fixed by inserting a NOP
between the two instructions.
In Example 4-13 there is a pipeline dependency due to contention in the LF bit of the SR register. During
the first execution cycle of the BFSET instruction, the SR, whose LF bit is zero, is read. At the same time,
the first operand of the DO instruction is fetched. During the second execution cycle of the BFSET
instruction, the SR’s content is modified and written back to the SR. This is also the DO instruction decode
cycle, when the LF bit is set. In this case, the LF bit is first set by the DO decode, then cleared by the
BFSET SR modification. A cleared LF bit signals the end of a DO loop, so the DO loop is executed only
once. This sequence can be fixed by inserting a NOP instruction between these two instructions.
;
ENDLOOP:
Freescale Semiconductor
MOVE
JSR
BFSET #$0200,SR
DO
(instructions)
#$3800,SP
LABEL
#8,ENDLOOP
Example 4-12. Dependency with a Write to the Stack Pointer Register
Example 4-13. Dependency with a Bit-Field Operation and DO Loop
; Write to the SP register
; SP implicitly used to save the return address
;
; Write to the SR register
; Repeat 8 times body of loop
Address Generation Unit
of the subroutine call
Pipeline Dependencies
4-35