dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 294
dsp56800
Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800.pdf
(448 pages)
- Current page: 294 of 448
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CMP
Condition Codes Affected:
Instruction Fields:
A-64
Operation
CMP
See Section 3.6.5, “16-Bit Destinations,” on page 3-35 for cases with X0, Y0, or Y1 as D.
See Section 3.6.2, “36-Bit Destinations — CC Bit Set,” on page 3-34 and Section 3.6.4, “20-Bit Des-
tinations — CC Bit Set,” on page 3-34 for the case when the CC bit is set.
LF
15
14
*
SZ — Set according to the standard definition of the SZ bit (parallel move)
L
E
U
N
Z
V
C
X:(SP-xx),FDD
13
#<0-31>,FDD
X:xxxx,FDD
*
#xxxx,FDD
Operands
X:aa,FDD
— Set if limiting (parallel move) or overflow has occurred in result
— Set if the signed integer portion of the result is in use
— Set if result is not normalized
— Set if bit 35 of the result is set
— Set if result equals zero
— Set if overflow has occurred in result
— Set if a carry (or borrow) occurs from bit 35 of the result
DD,FDD
F1,DD
A,B
B,A
12
*
MR
11
*
DSP56800 Family Manual
10
*
I1
9
C
Compare
2
6
4
6
4
6
I0
8
W
1
1
1
2
1
2
SZ
7
36-bit compare of two accumulators or data reg
Compare memory word with 36 bit accumulator.
X:aa represents a 6-bit absolute address. Refer to Abso-
lute Short Address (Direct Addressing): <aa> on page
4-22.
Note: Condition codes set based on 36-bit result
Compare register with an immediate integer 0–31
Compare register with a signed 16-bit immediate integer
L
6
E
5
U
4
CCR
N
3
Z
Comments
2
V
1
Freescale Semiconductor
C
0
CMP
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