dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 80

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Data Arithmetic Logic Unit
3.6.7
There are two instructions, TST and TSTW, that are useful for checking the value in a register or memory
location.
The condition codes for the TST instruction (on a 36-bit accumulator) with CC equal to zero are computed
as follows:
The condition codes for the TST instruction (on a 36-bit accumulator) with CC equal to one are computed
as follows:
The condition codes for the TSTW instruction (on a 16-bit value) are computed as follows:
3.6.8
When arithmetic on unsigned operands is being performed, the condition codes used to compare two
values differ from those used for signed arithmetic. See Section 3.3.7, “Unsigned Arithmetic,” for a
discussion of condition code usage for unsigned arithmetic.
3-36
L is set if limiting occurs in a parallel move.
E is set if the extension register is in use — that is, if bits 35–31 are not all the same.
U is set according to the standard definition of the U bit.
N is set if bit 35 of the corresponding accumulator is set except during saturation.
Z is set if bits 35–0 of the corresponding accumulator are all cleared.
V is always cleared.
C is always cleared.
L is set if limiting occurs in a parallel move.
E is set if the extension register is in use, that is, if bits 35–31 are not all the same.
U is set according to the standard definition of the U bit.
N is set if bit 31 of the corresponding accumulator is set.
Z is set if bits 31–0 of the corresponding accumulator are all cleared.
V is always cleared.
C is always cleared.
L is set if limiting occurs while reading an accumulator.
N is set if the MSB of the 16-bit value is set.
Z is set if all 16 bits of the 16-bit value are cleared.
V is always cleared.
C is always cleared.
TST and TSTW Instructions
Unsigned Arithmetic
DSP56800 Family Manual
Freescale Semiconductor

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