dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 317
dsp56800
Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800.pdf
(448 pages)
- Current page: 317 of 448
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JSR
Operation:
SP+1
PC
SP+1
SR
S
Description: Jump to subroutine in program memory at the location given by the instruction’s effective address. The
Example:
Explanation of Example:
Condition Codes Affected:
Restrictions:
Instruction Fields:
Timing:
Memory:
Freescale Semiconductor
Operation
JSR
→ SP
→ X:(SP)
→ SP
→ X:(SP)
→ PC
effective address is a 16-bit absolute address.
JSR
In this example, program execution is transferred to the subroutine at the address represented by LA-
BEL. The DSC core supports up to 16-bit program addresses.
The condition codes are not affected by this instruction.
A JSR instruction used within a DO loop cannot begin at the LA within that DO loop.
A JSR instruction used within a DO loop cannot specify the LA as its target.
A JSR instruction cannot be repeated using the REP instruction.
8 + jx oscillator clock cycles
2 program words
Operands
<ABS16>
LABEL
Jump to Subroutine
Instruction Set Details
C
8
Assembler Syntax:
JSR
W
2
; jump to absolute address of a
;
Push return address and status register and jump to 16-bit
target address
subroutine indicated by LABEL
S {<ABS16>}
Comments
JSR
A-87
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