dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 289

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

BRSET
Operation:
Branch if <bit field> of destination is all ones
Branch if <bit field> of destination is all ones
Description: Test all selected bits of the destination operand. If all the selected bits are set, C is set, and program
Usage:
Example:
Explanation of Example:
Condition Codes Affected:
Note:
Freescale Semiconductor
execution continues at the location in program memory at PC + displacement. Otherwise, C is cleared,
and execution continues with the next sequential instruction. The bits to be tested are selected by an
8-bit immediate value in which every bit set is to be tested.
This instruction is useful in performing I/O flag polling.
LABEL:
Prior to execution, the 16-bit X memory location X:$FFE2 contains the value $0FF0. Execution of the
instruction tests the state of bits 4, 5, 6, and 7 in X:$FFE2 and sets C (because all of the bits specified
in the immediate mask were set). Since C is set, program execution is transferred to the address offset
from the current program counter by the displacement specified in the instruction (the two INCW in-
structions are not executed)
If all bits in the mask are set to zero, C is set and the branch is taken. Refer to Table A-9 on page A-13
when the destination is the SR register.
Before Execution
X:$FFE2
LF
15
SR
14
*
L
C
13
*
— Set if data limiting occurred during 36-bit source move
— Set if all bits specified by the mask are set
BRSET
INCW
INCW
ADD
12
0FF0
0000
*
MR
Cleared if not all bits specified by the mask are set
11
*
Branch if Bits Set
10
#$00F0,X:<<$FFE2,LABEL
A
A
B,A
*
Instruction Set Details
I1
9
Assembler Syntax:
BRSET
BRSET
I0
8
SZ
7
L
6
5
E
After Execution
X:$FFE2
#iiii,X:<ea>,aa
#iiii,D,aa
U
4
CCR
SR
N
3
2
Z
0FF0
0001
V
1
C
0
BRSET
A-59