dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 384

no-image

dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
SUB
Condition Codes Affected:
Instruction Fields:
A-154
Operation
SUB
See Section 3.6.5, “16-Bit Destinations,” on page 3-35 for cases with X0, Y0, or Y1 as D.
See Section 3.6.2, “36-Bit Destinations — CC Bit Set,” on page 3-34 and Section 3.6.4, “20-Bit Des-
tinations — CC Bit Set,” on page 3-34 for the case when the CC bit is set.
15
LF
14
*
SZ — Set according to the standard definition of the SZ bit (parallel move)
L
E
U
N
Z
V
C
X:(SP-xx),FDD
13
#<0-31>,FDD
X:xxxx,FDD
*
#xxxx,FDD
Operands
X:aa,FDD
— Set if limiting (parallel move) or overflow has occurred in result
— Set if the extension portion of accumulator result is in use
— Set according to the standard definition of the U bit
— Set if MSB of result is set
— Set if result equals zero
— Set if overflow has occurred in the result
— Set if a carry (or borrow) occurs from MSB of result
DD,FDD
F1,DD
A,B
B,A
Y,A
Y,B
12
*
MR
11
*
DSP56800 Family Manual
10
*
I1
9
C
2
6
4
6
4
6
Subtract
I0
8
W
1
1
1
2
1
2
SZ
7
36-bit subtract of two registers. 16-bit source registers are
first sign extended internally and concatenated with 16
zero bits to form a 36-bit operand.
Subtract memory word from register.
X:aa represents a 6-bit absolute address. Refer to Abso-
lute Short Address (Direct Addressing): <aa> on page
4-22.
Subtract an immediate value 0–31
Subtract a signed 16-bit immediate integer
L
6
E
5
U
4
CCR
N
3
Z
Comments
2
V
1
Freescale Semiconductor
C
0
SUB

Related parts for dsp56800