dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 380

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Condition Codes Affected:
SBC
Operation:
D - S - C → D
Description: Subtract the source operand (S) and the carry bit (C) from the second operand, and store the result in
Usage:
Example:
Explanation of Example:
Note:
A-150
Before Execution
A2
Y
0
the destination (D). The source operand (S) is always register Y, which is first sign extended internally
to form a 36-bit value before being subtracted from the destination accumulator. When the saturation
bit (SA) is set, the MAC Output Limiter is enabled and this instruction will saturate the result if an
overflow occurred, (refer to Section 3.4, “Saturation and Data Limiting,” on page 3-26).
This instruction is typically used in multi-precision subtraction operations (see Section 3.3.8.1,
“Multi-Precision Addition and Subtraction,” on page 3-23) when it is necessary to subtract two num-
bers that are larger than 32 bits, such as 64-bit or 96-bit subtraction.
SBC
Prior to execution, the 32-bit Y register (comprised of the Y1 and Y0 registers) contains the value
$3FFF:FFFE, and the 36-bit accumulator contains the value $0:4000:0000. In addition, C is set to one.
The SBC instruction automatically sign extends the 32-bit Y registers to 36-bits and subtracts this val-
ue from the 36-bit accumulator. In addition, C is subtracted from the LSB of this 36-bit addition. The
36-bit result is stored back in the A accumulator, and the conditions codes are set correctly. The Y1:Y0
register pair is not affected by this instruction.
C is set correctly for multi-precision arithmetic using long-word operands only when the extension reg-
ister of the destination accumulator (A2 or B2) contains sign extension of bit 31 of the destination ac-
cumulator (A or B).
15
LF
3FFF
4000
14
A1
Y1
*
L
E
U
N
Z
V
C
13
*
SR
— Set if overflow has occurred in result
— Set if the extension portion of accumulator result is in use
— Set according to the standard definition of the U bit
— Set if bit 35 of accumulator result is set
— Set if result equals zero; cleared otherwise
— Set if overflow has occurred in result
— Set if a carry (or borrow) occurs from bit 35 of result
Y,A
12
*
MR
Subtract Long with Carry
11
*
FFFE
0000
0301
A0
Y0
DSP56800 Family Manual
10
*
I1
9
Assembler Syntax:
SBC
I0
8
SZ
7
After Execution
L
6
A2
Y
0
E
5
S,D
U
4
CCR
3FFF
0000
A1
Y1
N
3
SR
Z
2
V
1
Freescale Semiconductor
FFFE
0001
0310
C
0
A0
Y0
SBC