dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 382

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

STOP
Operation:
Enter the stop processing state
Description: Enter the stop processing state. All activity in the processor is suspended until the RESET pin is as-
Restrictions:
Example:
Explanation of Example:
Condition Codes Affected:
Instruction Fields:
Timing:
Memory:
A-152
Operation
STOP
serted, the IRQA pin is asserted, or an on-chip peripheral asserts a signal to exit the stop processing
state. The stop processing state is a very low-power standby mode where all clocks to the DSC core,
as well as the clocks to many of the on-chip peripherals such as serial ports, are gated off. It is still
possible for timers to continue to run in stop state. In these cases the timers can be individually powered
down at the peripheral itself for lower power consumption. The clock oscillator can also be disabled
for lowest power consumption.
When the exit from the stop state is caused by a low level on the RESET pin, then the processor enters
the reset processing state. The time to recover from the stop state using RESET will depend on a clock
stabilization delay controlled by the stop delay (SD) bit in the OMR.
When the exit from the stop state is caused by a low level on the IRQA pin, then the processor will
service the highest priority pending interrupt and will not service the IRQA interrupt unless it is highest
priority. The interrupt will be serviced after an internal delay counter counts 524,284 clock phases (that
is, [2
stabilization count delay, all peripherals and external interrupts are cleared and re-enabled/arbitrated
at the start of the 17T period following the count interval. The processor will resume program execu-
tion at the instruction following the STOP instruction (the one that caused the entry into the stop state)
after the interrupts have been serviced or, if no interrupt was pending, immediately after the delay
count plus 17T. If the IRQA pin is asserted when the STOP instruction is executed, the internal delay
counter will be started. Refer to Section 7.5, “Stop Processing State,” on page 7-19 for details on the
stop mode.
A STOP instruction cannot be repeated using the REP instruction.
A STOP instruction cannot be the last instruction in a DO loop (that is, at the LA).
STOP
The STOP instruction suspends all processor activity until the processor is reset or interrupted as pre-
viously described. The STOP instruction puts the processor in a low-power standby mode. No new in-
structions are fetched until the processor exits the STOP processing state.
The condition codes are not affected by this instruction.
The STOP instruction disables internal distribution of the clock. The time to exit the stop state depends
on the value of the SD bit.
1 program word
19
-4]T) or 28 clock phases (that is, [2
Operands
; enter low-power standby mode
Stop Instruction Processing
DSP56800 Family Manual
N/A
C
Assembler Syntax:
STOP
W
5
1
-4]T) of delay if the SD bit is set to one. During this clock
Enter STOP low-power mode
Comments
Freescale Semiconductor
STOP