dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 250

• Manufacturer Part Number: dsp56800
• Description: 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

A-20
Jcc, Bcc — condition true
Jcc, Bcc — condition false
JMP, JSR
16-bit immediate
Register
X memory ↔ register
BFCHG, BFCLR, or BFSET on X memory
BFTSTH or BFTSTL on X memory
BFTSTH, BFTSTL, BFCHG, BFCLR, or BFSET on register
BRSET or BRCLR with condition true
BRSET or BRCLR with condition false
Register ↔ P memory
Note:
during DATA read or write operations and does not refer to instruction fetches.
All two-word jumps execute three program memory fetches to refill the
pipeline, one of them being the instruction word located at the jump
instruction’s second-word address + 1. If the jump instruction was fetched
from a program memory segment with wait states, another “ap” should be
added to account for that third fetch.
→
The “ap” term represents the wait states spent when accessing the program memory
register
MOVEC Operation
Bit-Field Manipulation Operation
Branch/Jump Instruction Operation
→
Table A-16. Branch/Jump Instruction Timing Summary
Table A-15. Bit-Field Manipulation Timing Summary
MOVEM
register
Table A-14. MOVEM Timing Summary
Table A-13. MOVEC Timing Summary
DSP56800 Family Manual
NOTE:
+ mvm Cycles
+ mvc Cycles
ea + ax
ap
2
0
2 + ea + (2 * ax)
+ mvb Cycles
ea + (2 * ax)
ea + (2 * ax)
ea + ax
+ jx Cycles
2 + (2 * ap)
(2 * ap)
(2 * ap)
0
Freescale Semiconductor