dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 249
dsp56800
Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800.pdf
(448 pages)
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Freescale Semiconductor
EORC
ILLEGAL
IMPY16
INCW
Jcc
JMP
JSR
LEA
LSL
LSLL
LSR
1.
2.
counter counts 65,536 cycles before enabling the clock to the internal DSC circuits.
3.
the time the WAIT instruction is executed.
Mnemonic
This MOVE applies only to the case where two reads are performed in parallel from the X memory.
The STOP instruction disables the internal clock oscillator. After the clock is turned on, an internal
The WAIT instruction takes a minimum of 16 cycles to execute when an internal interrupt is pending at
No parallel data move
X: (X memory move)
X: X: (XX memory move)
Parallel Move Operation
2+ea
1
1
1+ea
2
2
2
1+ea
1
1
1
Instruction
Words
Table A-11. Instruction Timing Summary (Continued)
Table A-12. Parallel Move Timing
4+mvb
4
2
2+(ea or mv)
4+jx
6+jx
8+jx
2+ea
2
2
2
Clock Cycles
Instruction Set Details
RTS
SBC
STOP
SUB
SWI
Tcc
TFR
TST
TSTW
WAIT
Mnemonic
+ mv Words
2
3
0
0
0
1
1
1
1+ea
1
1
1
1
1
1
Instruction
Words
+mv Cycles
axx
ax
0
10+rx
2
n/a
2+(ea or mv)
8
2
2+mv
2+mv
2+mv
n/a
Clock Cycles
A-19
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