dsp56800 Freescale Semiconductor, Inc, dsp56800 Datasheet - Page 290

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dsp56800

Manufacturer Part Number
dsp56800
Description
16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
BRSET
Instruction Fields:
Timing:
Memory:
A-60
Operation
BRSET
1.
refers to the case when the condition is false and the branch is not taken.
The first cycle count refers to the case when the condition is true and the branch is taken. The second cycle count
#<MASK8>,X:(R2+xx),<OFFSET7>
#<MASK8>,X:(SP-xx),<OFFSET7>
#<MASK8>,DDDDD,<OFFSET7>
Refer to the preceding Instruction Fields table
Refer to the preceding Instruction Fields table
#<MASK8>,X:<<pp,<OFFSET7>
#<MASK8>,X:xxxx,<OFFSET7>
#<MASK8>,X:aa,<OFFSET7>
Operands
DSP56800 Family Manual
Branch if Bits Set
12/10
12/10
12/10
10/8
10/8
10/8
C
1
W
2
2
2
2
2
3
BRSET tests all bits selected by the immediate mask. If
all selected bits are set, then the carry bit is set and a PC
relative branch occurs. Otherwise it is cleared and no
branch occurs.
All registers in DDDDD are permitted except HWS.
MASK8 specifies a 16-bit immediate value where
either the upper or lower 8 bits contains all zeros.
AA specifies a 7-bit PC relative offset.
X:aa represents a 6-bit absolute address. Refer to Abso-
lute Short Address (Direct Addressing): <aa> on
page 4-22.
X:<<pp represents a 6-bit absolute I/O address. Refer
to I/O Short Address (Direct Addressing): <pp> on
page 4-23.
Comments
Freescale Semiconductor
BRSET

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