EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 95

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

4.3.1 The CMSIS mapping of the Cortex-M3 SCB registers
4.3.2 Auxiliary Control Register
2011-02-04 - d0002_Rev1.00
1
2
To improve software efficiency, the CMSIS simplifies the SCB register presentation. In the CMSIS, the
byte array SHP[0] to SHP[12] corresponds to the registers SHPR1-SHPR3.
The ACTLR provides disable bits for the following processor functions:
• IT folding
• write buffer use for accesses to the default memory map
• interruption of multi-cycle instructions.
See the register summary in Table 4.12 (p. 94) for the ACTLR attributes. The bit assignments are:
Table 4.13. ACTLR bit assignments
31
See the register description for more information.
A subregister of the CFSR.
Address
0xE000ED00 CPUID
0xE000ED04 ICSR
0xE000ED08 VTOR
0xE000ED0C AIRCR
0xE000ED10 SCR
0xE000ED14 CCR
0xE000ED18 SHPR1
0xE000ED1C SHPR2
0xE000ED20 SHPR3
0xE000ED24 SHCRS
0xE000ED28 CFSR
0xE000ED28 MMSR
0xE000ED29 BFSR
0xE000ED2A UFSR
0xE000ED2C HFSR
0xE000ED34 MMAR
0xE000ED38 BFAR
Bits
[31:3]
Name
-
Name
2
2
2
Type
RO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Function
Reserved
1
1
Required
privilege
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Reset value Description
0x412FC23n n=0 for devices with revision r2p0. n=1 for devices with
0x00000000 Section 4.3.4 (p. 96)
0x00000000 Section 4.3.5 (p. 98)
0xFA050000 Section 4.3.6 (p. 99)
0x00000000 Section 4.3.7 (p. 100)
0x00000200 Section 4.3.8 (p. 101)
0x00000000 Section 4.3.9.1 (p. 103)
0x00000000 Section 4.3.9.2 (p. 103)
0x00000000 Section 4.3.9.3 (p. 103)
0x00000000 Section 4.3.10 (p. 103)
0x00000000 Section 4.3.11 (p. 105)
0x00
0x00
0x0000
0x00000000 Section 4.3.12 (p. 109)
Unknown
Unknown
Reserved
...the world's most energy friendly microcontrollers
revision r2p1.Section 4.3.3 (p. 96)
Section 4.3.11.1 (p. 105)
Section 4.3.11.2 (p. 107)
Section 4.3.11.3 (p. 108)
Section 4.3.13 (p. 110)
Section 4.3.14 (p. 110)
95
DISDEFWBUF
DISMCYCINT
DISFOLD
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