EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 113

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

4.4.4 SysTick Calibration Value Register
4.4.5 SysTick design hints and tips
4.5 Memory protection unit
2011-02-04 - d0002_Rev1.00
The CALIB register indicates the SysTick calibration properties and is a read only register. See the
register summary in Table 4.32 (p. 111) for its attributes. The bit assignments are:
Table 4.36. CALIB register bit assignments
If calibration information is not known, calculate the calibration value required from the frequency of the
processor clock or external clock.
The SysTick counter runs on the processor clock or bit 0 of the RTC counter value. If the clock signal in
use is stopped (e.g. in lower Energy Modes), the SysTick counter stops.
Ensure software uses aligned word accesses to access the SysTick registers.
This section describes the Memory protection unit (MPU).
The MPU divides the memory map into a number of regions, and defines the location, size, access
permissions, and memory attributes of each region. It supports:
• independent attribute settings for each region
• overlapping regions
• export of memory attributes to the system.
The memory attributes affect the behavior of memory accesses to the region. The Cortex-M3 MPU
defines:
• eight separate memory regions, 0-7
• a background region.
When memory regions overlap, a memory access is affected by the attributes of the region with the
highest number. For example, the attributes for region 7 take precedence over the attributes of any
region that overlaps region 7.
The background region has the same memory access attributes as the default memory map, but is
accessible from privileged software only.
Bits
[31]
[30]
[29:24]
[23:0]
31
Name
NOREF
SKEW
-
TENMS
30
29
SKEW
NOREF
Reserved
Function
Reads as zero. Indicates that a the RTC counter bit 0 is provided as a reference clock.
Reads as one. Calibration value for the 10ms inexact timing is not known because TENMS is not
known . This can affect the suitability of SysTick as a software real time clock.
Reserved.
Read as 0x0036B0, which gives 10 ms ticks when running off a 14 MHz clock.
24
23
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113
TENMS
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0