EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 29

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2.4.2 Fault escalation and hard faults
2.4.3 Fault status registers and fault address registers
2011-02-04 - d0002_Rev1.00
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2
All faults exceptions except for hard fault have configurable exception priority, see Section 4.3.9 (p.
102) . Software can disable execution of the handlers for these faults, see Section 4.3.10 (p. 103) .
Usually, the exception priority, together with the values of the exception mask registers, determines
whether the processor enters the fault handler, and whether a fault handler can preempt another fault
handler. as described in Section 2.3 (p. 22) .
In some situations, a fault with configurable priority is treated as a hard fault. This is called priority
escalation, and the fault is described as escalated to hard fault. Escalation to hard fault occurs when:
• A fault handler causes the same kind of fault as the one it is servicing. This escalation to hard fault
• A fault handler causes a fault with the same or lower priority as the fault it is servicing. This is because
• An exception handler causes a fault for which the priority is the same as or lower than the currently
• A fault occurs and the handler for that fault is not enabled.
If a bus fault occurs during a stack push when entering a bus fault handler, the bus fault does not escalate
to a hard fault. This means that if a corrupted stack causes a fault, the fault handler executes even though
the stack push for the handler failed. The fault handler operates but the stack contents are corrupted.
Note
The fault status registers indicate the cause of a fault. For bus faults and memory management faults,
the fault address register indicates the address accessed by the operation that caused the fault, as
shown in Table 2.18 (p. 30) .
Occurs on an access to an XN region even if the MPU is disabled, or not included in the device.
Attempting to use an instruction set other than the Thumb instruction set.
Fault
Bus error:
Precise data bus error
Imprecise data bus error
Attempt to access a coprocessor
Undefined instruction
Attempt to enter an invalid instruction set state
Invalid EXC_RETURN value
Illegal unaligned load or store
Divide By 0
occurs because a fault handler cannot preempt itself because it must have the same priority as the
current priority level.
the handler for the new fault cannot preempt the currently executing fault handler.
executing exception.
during exception stacking
during exception unstacking
during exception stacking
during exception unstacking
during instruction prefetch
Only Reset and NMI can preempt the fixed priority hard fault. A hard fault can preempt any
exception other than Reset, NMI, or another hard fault.
2
Handler
Bus fault
Usage fault
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Bit name
MSTKERR
MUNSKERR
-
STKERR
UNSTKERR
IBUSERR
PRECISERR
IMPRECISERR
NOCP
UNDEFINSTR
INVSTATE
INVPC
UNALIGNED
DIVBYZERO
Fault status register
-
Section 4.3.11.2 (p. 107)
Section 4.3.11.3 (p. 108)
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