EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 122

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

4.5.8.3 Subregions
2011-02-04 - d0002_Rev1.00
; R3 = size, attributes in one
LDR R0, =MPU_RNR
STR R1, [R0, #0x0]
STR R2, [R0, #0x4]
STR R3, [R0, #0x8]
Use an STM instruction to optimize this:
; R1 = region number
; R2 = address
; R3 = size, attributes in one
LDR R0, =MPU_RNR
STM R0, {R1-R3}
You can do this in two words for pre-packed information. This means that the RBAR contains the required
region number and had the VALID bit set to 1, see Section 4.5.4 (p. 117) . Use this when the data is
statically packed, for example in a boot loader:
; R1 = address and region number in one
; R2 = size and attributes in one
LDR R0, =MPU_RBAR
STR R1, [R0, #0x0]
; region number combined with VALID (bit 4) set to 1
STR R2, [R0, #0x4]
Use an STM instruction to optimize this:
; R1 = address and region number in one
; R2 = size and attributes in one
LDR R0,=MPU_RBAR
STM R0, {R1-R2}
; and Region Attribute, Size and Enable
Regions of 256 bytes or more are divided into eight equal-sized subregions. Set the corresponding bit
in the SRD field of the RASR to disable a subregion, see Section 4.5.5 (p. 117) . The least significant
; 0xE000ED98, MPU region number register
; Region Number
; Region Base Address
; Region Attribute, Size and Enable
; 0xE000ED98, MPU region number register
; Region Number, address, attribute, size and enable
; 0xE000ED9C, MPU Region Base register
; Region base address and
; Region Attribute, Size and Enable
; 0xE000ED9C, MPU Region Base register
; Region base address, region number and VALID bit,
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