EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 52

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

3.4.5.4 Condition flags
3.4.5.5 Examples
3.4.6 LDM and STM
3.4.6.1 Syntax
3.4.6.2 Operation
2011-02-04 - d0002_Rev1.00
• if the instruction is conditional, it must be the last instruction in the IT block.
These instructions do not change the flags.
Load and Store Multiple registers.
op{addr_mode}{cond} Rn{!}, reglist
where:
op
addr_mode is any one of the following:
cond
Rn
!
reglist
LDM and LDMFD are synonyms for LDMIA. LDMFD refers to its use for popping data from Full Descending
stacks.
LDMEA is a synonym for LDMDB, and refers to its use for popping data from Empty Ascending stacks.
STM and STMEA are synonyms for STMIA. STMEA refers to its use for pushing data onto Empty Ascending
stacks.
STMFD is s synonym for STMDB, and refers to its use for pushing data onto Full Descending stacks
LDM instructions load the registers in reglist with word values from memory addresses based on Rn.
STM instructions store the word values in the registers in reglist to memory addresses based on Rn.
For LDM, LDMIA, LDMFD, STM, STMIA, and STMEA the memory addresses used for the accesses are
at 4-byte intervals ranging from Rn to Rn + 4 * (n-1), where n is the number of registers in reglist.
The accesses happens in order of increasing register numbers, with the lowest numbered register using
LDR
LDRSB
R0, LookUpTable
R7, localdata
is one of:
LDM Load Multiple registers.
STM Store Multiple registers.
IA Increment address After each access. This is the default.
DB Decrement address Before each access.
is an optional condition code, see Section 3.3.7 (p. 43) .
is the register on which the memory addresses are based.
is an optional writeback suffix. If ! is present the final address, that is loaded from or
stored to, is written back into Rn.
is a list of one or more registers to be loaded or stored, enclosed in braces. It can contain
register ranges. It must be comma separated if it contains more than one register or
register range, see Section 3.4.6.5 (p. 53) .
; Load R0 with a word of data from an address
; labelled as LookUpTable
; Load a byte value from an address labelled
; as localdata, sign extend it to a word
; value, and put it in R7
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