EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 107

MCU 32BIT 64KB FLASH 32-QFN

EFM32G200F64

Manufacturer Part Number
EFM32G200F64
Description
MCU 32BIT 64KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets

Specifications of EFM32G200F64

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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4.3.11.2 Bus Fault Status Register
2011-02-04 - d0002_Rev1.00
The flags in the BFSR indicate the cause of a bus access fault. The bit assignments are:
Table 4.27. BFSR bit assignments
Bits
[7]
[6:5]
[4]
[3]
[2]
[1]
IMPRECISERR
PRECISERR
BFARVALID
UNSTKERR
Reserved
IBUSERR
Name
BFARVALID
-
STKERR
UNSTKERR
IMPRECISERR
PRECISERR
STKERR
7 6 5 4 3 2 1 0
Function
Bus Fault Address Register (BFAR) valid flag:
0 = value in BFAR is not a valid fault address
1 = BFAR holds a valid fault address.
The processor sets this bit to 1 after a bus fault where the address is known. Other faults can
set this bit to 0, such as a memory management fault occurring later.
If a bus fault occurs and is escalated to a hard fault because of priority, the hard fault handler
must set this bit to 0. This prevents problems if returning to a stacked active bus fault handler
whose BFAR value has been overwritten.
Reserved.
Bus fault on stacking for exception entry:
0 = no stacking fault
1 = stacking for an exception entry has caused one or more bus faults.
When the processor sets this bit to 1, the SP is still adjusted but the values in the context area
on the stack might be incorrect. The processor does not write a fault address to the BFAR.
Bus fault on unstacking for a return from exception:
0 = no unstacking fault
1 = unstack for an exception return has caused one or more bus faults.
This fault is chained to the handler. This means that when the processor sets this bit to 1,
the original return stack is still present. The processor does not adjust the SP from the failing
return, does not performed a new save, and does not write a fault address to the BFAR.
Imprecise data bus error:
0 = no imprecise data bus error
1 = a data bus error has occurred, but the return address in the stack frame is not related to the
instruction that caused the error.
When the processor sets this bit to 1, it does not write a fault address to the BFAR.
This is an asynchronous fault. Therefore, if it is detected when the priority of the current
process is higher than the bus fault priority, the bus fault becomes pending and becomes active
only when the processor returns from all higher priority processes. If a precise fault occurs
before the processor enters the handler for the imprecise bus fault, the handler detects both
IMPRECISERR set to 1 and one of the precise fault status bits set to 1.
Precise data bus error:
0 = no precise data bus error
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