EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 70

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

3.7.1.2 Operation
3.7.1.3 Restrictions
3.7.1.4 Condition flags
3.7.1.5 Examples
2011-02-04 - d0002_Rev1.00
where:
op
cond
Rd
n
Rm
shift#s
These instructions saturate to a signed or unsigned n-bit value.
The SSAT instruction applies the specified shift, then saturates to the signed range #2
The USAT instruction applies the specified shift, then saturates to the unsigned range 0 # x # 2
For signed n-bit saturation using SSAT, this means that:
• if the value to be saturated is less than #2
• if the value to be saturated is greater than 2
• otherwise, the result returned is the same as the value to be saturated.
For unsigned n-bit saturation using USAT, this means that:
• if the value to be saturated is less than 0, the result returned is 0
• if the value to be saturated is greater than 2
• otherwise, the result returned is the same as the value to be saturated.
If the returned result is different from the value to be saturated, it is called saturation. If saturation occurs,
the instruction sets the Q flag to 1 in the APSR. Otherwise, it leaves the Q flag unchanged. To clear the
Q flag to 0, you must use the MSR instruction, see Section 3.10.7 (p. 83) .
To read the state of the Q flag, use the MRS instruction, see Section 3.10.6 (p. 83) .
Do not use SP and do not use PC.
These instructions do not affect the condition code flags.
If saturation occurs, these instructions set the Q flag to 1.
SSAT
R7, #16, R7, LSL #4
is one of:
SSAT Saturates a signed value to a signed range.
USAT Saturates a signed value to an unsigned range.
is an optional condition code, see Section 3.3.7 (p. 43) .
is the destination register.
specifies the bit position to saturate to:
• n ranges from 1 to 32 for SSAT
• n ranges from 0 to 31 for USAT.
is the register containing the value to saturate.
is an optional shift applied to Rm before saturating. It must be one of
the following:
ASR #s
LSL #s
; Logical shift left value in R7 by 4, then
n#1
n#1
n
#1, the result returned is 2
, the result returned is #2
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#1, the result returned is 2
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where s is in the range 1 to 31
where s is in the range 0 to 31.
n-1
n
#1
n-1
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#1
n–1
# x # 2
n
#1.
n–1
#1.