EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 119

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

4.5.6 MPU access permission attributes
2011-02-04 - d0002_Rev1.00
1
This section describes the MPU access permission attributes. The access permission bits, TEX, C, B,
S, AP, and XN, of the RASR, control access to the corresponding memory region. If an access is made
to an area of memory without the required permissions, then the MPU generates a permission fault.
Table 4.45 (p. 119) shows the encodings for the TEX, C, B, and S access permission bits.
Table 4.45. TEX, C, B, and S encoding
1
2
Table 4.46 (p. 119) shows the cache policy for memory attribute encodings with a TEX value is in
the range 4-7.
Table 4.46. Cache policy for memory attribute encoding
In the RBAR, see Section 4.5.4 (p. 117) .
The MPU ignores the value of this bit.
See Table 4.46 (p. 119) for the encoding of the AA and BB bits.
SIZE value
b01001 (9)
b10011 (19)
b11101 (29)
b11111 (31)
TEX
b000
b001
b010
b1BB
Encoding, AA or BB
00
01
10
11
C
0
1
0
1
0
1
A
B
0
1
0
1
0
1
0
1
0
1
x
A
1
Region size
1KB
1MB
1GB
4GB
S
x
x
0
1
0
1
0
1
x
x
0
1
x
x
x
0
1
1
1
1
1
1
1
1
Memory type
Strongly-ordered
Device
Normal
Normal
Normal
Reserved encoding
Implementation defined attributes.
Normal
Device
Reserved encoding
Reserved encoding
Normal
Corresponding cache policy
Non-cacheable
Write back, write and read allocate
Write through, no write allocate
Write back, no write allocate
Value of N
10
20
30
b01100
1
Shareability
Shareable
Shareable
Not shareable
Shareable
Not shareable
Shareable
Not shareable
Shareable
Not shareable
Shareable
Not shareable
Not shareable
Shareable
Note
-
-
-
Maximum possible size
...the world's most energy friendly microcontrollers
Other attributes
-
-
Outer and inner write-through. No write allocate.
Outer and inner write-back. No write allocate.
Outer and inner noncacheable.
-
-
Outer and inner write-back. Write and read allocate.
Nonshared Device.
-
-
Cached memory
119
2
, BB = outer policy, AA = inner policy.
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