EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 22

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2.3 Exception model
2.3.1 Exception states
2.3.2 Exception types
2011-02-04 - d0002_Rev1.00
__ldrex((volatile char *) 0xFF);
This section describes the exception model.
Each exception is in one of the following states:
Inactive
Pending
Active
Active and pending
The exception types are:
Reset
NMI
Hard fault
Memory management fault
Bus fault
The exception is not active and not pending.
The exception is waiting to be serviced by the processor.
An interrupt request from a peripheral or from software can change the state
of the corresponding interrupt to pending.
An exception that is being serviced by the processor but has not completed.
Note
The exception is being serviced by the processor and there is a pending
exception from the same source.
Reset is invoked on power up or a warm reset. The exception model
treats reset as a special form of exception. When reset is asserted,
the operation of the processor stops, potentially at any point in an
instruction. When reset is deasserted, execution restarts from the
address provided by the reset entry in the vector table. Execution
restarts as privileged execution in Thread mode.
In the EFM32 devices a NonMaskable Interrupt (NMI) can only be
triggered by software. This is the highest priority exception other than
reset. It is permanently enabled and has a fixed priority of -2. NMIs
cannot be:
• masked or prevented from activation by any other exception
• preempted by any exception other than Reset.
A hard fault is an exception that occurs because of an error during
exception processing, or because an exception cannot be managed by
any other exception mechanism. Hard faults have a fixed priority of -1,
meaning they have higher priority than any exception with configurable
priority.
A memory management fault is an exception that occurs because
of a memory protection related fault. The MPU or the fixed memory
protection constraints determines this fault, for both instruction and
data memory transactions. This fault is used to abort instruction
accesses to Execute Never (XN) memory regions, even if the MPU
is disabled.
A bus fault is an exception that occurs because of a memory related
fault for an instruction or data memory transaction. This might be from
an error detected on a bus in the memory system.
An exception handler can interrupt the execution of another
exception handler. In this case both exceptions are in the active
state.
...the world's most energy friendly microcontrollers
22
www.energymicro.com