EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 4

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

1.2.2 Integrated configurable debug
1.2.3 Cortex-M3 processor features and benefits summary
1.2.4 Cortex-M3 core peripherals
2011-02-04 - d0002_Rev1.00
The Cortex-M3 processor in some EFM32 devices include a memory protection unit (MPU) that provides
fine grain memory control, enabling applications to implement security privilege levels, separating code,
data and stack on a task-by-task basis. Such requirements are becoming critical in many embedded
applications such as automotive. The Memory Protection Unit is only available in some EFM32 devices
(Table 1.1 (p. 5) ).
The Cortex-M3 processor implements a complete hardware debug solution. This provides high system
visibility of the processor and memory through a 2-pin Serial Wire Debug (SWD) port that is ideal for
microcontrollers and other small package devices.
For system trace the processor integrates an Instrumentation Trace Macrocell (ITM) alongside data
watchpoints and a profiling unit. To enable simple and cost-effective profiling of the system events these
generate, a Serial Wire Viewer (SWV) can export a stream of software-generated messages, data trace,
and profiling information through a single pin.
The Embedded Trace Macrocell™ (ETM) delivers unrivalled instruction trace capture in an area far
smaller than traditional trace units. The ETM is only available in some EFM32 devices (Table 1.1 (p.
5) ).
• tight integration of system peripherals reduces area and development costs
• Thumb instruction set combines high code density with 32-bit performance
• code-patch ability for ROM system updates
• power control optimization of system components
• integrated sleep modes for low power consumption
• fast code execution permits slower processor clock or increases sleep mode time
• hardware division and fast multiplier
• deterministic, high-performance interrupt handling for time-critical applications
• memory protection unit (MPU) for safety-critical applications. Only available on some devices.
• extensive debug and trace capabilities:
These are:
Nested Vectored Interrupt
Controller
System control block
System timer
Memory protection unit
• Serial Wire Debug and Serial Wire Trace reduce the number of pins required for debugging and
tracing.
The Nested Vectored Interrupt Controller (NVIC) is an embedded
interrupt controller that supports low latency interrupt processing.
The System control block (SCB) is the programmers model interface
to the processor. It provides system implementation information and
system control, including configuration, control, and reporting of
system exceptions.
The system timer, SysTick, is a 24-bit count-down timer. Use this
as a Real Time Operating System (RTOS) tick timer or as a simple
counter.
The Memory protection unit (MPU) improves system reliability by
defining the memory attributes for different memory regions. It
provides up to eight different regions, and an optional predefined
background region. The Memory Protection Unit is only available in
some EFM32 devices (Table 1.1 (p. 5) ).
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