EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 56

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

3.4.9 CLREX
3.4.9.1 Syntax
3.4.9.2 Operation
3.4.9.3 Condition flags
3.4.9.4 Examples
3.5 General data processing instructions
2011-02-04 - d0002_Rev1.00
Clear Exclusive.
CLREX{cond}
where:
cond is an optional condition code, see Section 3.3.7 (p. 43) .
Use CLREX to make the next STREX, STREXB, or STREXH instruction write 1 to its destination register and
fail to perform the store. It is useful in exception handler code to force the failure of the store exclusive if
the exception occurs between a load exclusive instruction and the matching store exclusive instruction
in a synchronization operation.
See Section 2.2.7 (p. 20) for more information.
These instructions do not change the flags.
CLREX
Table 3.8 (p. 56) shows the data processing instructions:
Table 3.8. Data processing instructions
Mnemonic
ADC
ADD
ADDW
AND
ASR
BIC
CLZ
CMN
CMP
EOR
LSL
LSR
MOV
MOVT
MOVW
Brief description
Add with Carry
Add
Add
Logical AND
Arithmetic Shift Right
Bit Clear
Count leading zeros
Compare Negative
Compare
Exclusive OR
Logical Shift Left
Logical Shift Right
Move
Move Top
Move 16-bit constant
...the world's most energy friendly microcontrollers
56
See
Section 3.5.1 (p. 57)
Section 3.5.1 (p. 57)
Section 3.5.1 (p. 57)
Section 3.5.2 (p. 59)
Section 3.5.3 (p. 60)
Section 3.5.2 (p. 59)
Section 3.5.4 (p. 61)
Section 3.5.5 (p. 62)
Section 3.5.5 (p. 62)
Section 3.5.2 (p. 59)
Section 3.5.3 (p. 60)
Section 3.5.3 (p. 60)
Section 3.5.6 (p. 62)
Section 3.5.7 (p. 64)
Section 3.5.6 (p. 62)
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