EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 120

MCU 32BIT 64KB FLASH 32-QFN

EFM32G200F64

Manufacturer Part Number
EFM32G200F64
Description
MCU 32BIT 64KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets

Specifications of EFM32G200F64

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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4.5.7 MPU mismatch
4.5.8 Updating an MPU region
4.5.8.1 Updating an MPU region using separate words
2011-02-04 - d0002_Rev1.00
Table 4.47 (p. 120) shows the AP encodings that define the access permissions for privileged and
unprivileged software.
Table 4.47. AP encoding
When an access violates the MPU permissions, the processor generates a memory management fault,
see Section 2.1.4 (p. 13) . The MMFSR indicates the cause of the fault. See Section 4.3.11.1 (p. 105)
for more information.
To update the attributes for an MPU region, update the RNR, RBAR and RASR registers. You can
program each register separately, or use a multiple-word write to program all of these registers. You can
use the RBAR and RASR aliases to program up to four regions simultaneously using an STM instruction.
Simple code to configure one region:
; R1 = region number
; R2 = size/enable
; R3 = attributes
; R4 = address
LDR R0,=MPU_RNR
STR R1, [R0, #0x0]
STR R4, [R0, #0x4]
STRH R2, [R0, #0x8]
STRH R3, [R0, #0xA]
Disable a region before writing new region settings to the MPU if you have previously enabled the region
being changed. For example:
AP[2:0]
000
001
010
011
100
101
110
111
Privileged
permissions
No access
RW
RW
RW
Unpredictable
RO
RO
RO
Unprivileged
permissions
No access
No access
RO
RW
Unpredictable
No access
RO
RO
; 0xE000ED98, MPU region number register
; Region Number
; Region Base Address
; Region Size and Enable
; Region Attribute
Description
All accesses generate a permission fault
Access from privileged software only
Writes by unprivileged software generate a permission fault
Full access
Reserved
Reads by privileged software only
Read only, by privileged or unprivileged software
Read only, by privileged or unprivileged software
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