EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 35

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2011-02-04 - d0002_Rev1.00
Mnemonic
MLA
MLS
MOV, MOVS
MOVT
MOVW, MOV
MRS
MSR
MUL, MULS
MVN, MVNS
NOP
ORN, ORNS
ORR, ORRS
POP
PUSH
RBIT
REV
REV16
REVSH
ROR, RORS
RRX, RRXS
RSB, RSBS
SBC, SBCS
SBFX
SDIV
SEV
SMLAL
Operands
Rd, Rn, Rm, Ra
Rd, Rn, Rm, Ra
Rd, Op2
Rd, #imm16
Rd, #imm16
Rd, spec_reg
spec_reg, Rm
{Rd,} Rn, Rm
Rd, Op2
-
{Rd,} Rn, Op2
{Rd,} Rn, Op2
reglist
reglist
Rd, Rn
Rd, Rn
Rd, Rn
Rd, Rn
Rd, Rm, <Rs|#n>
Rd, Rm
{Rd,} Rn, Op2
{Rd,} Rn, Op2
Rd, Rn, #lsb,
#width
{Rd,} Rn, Rm
-
RdLo, RdHi, Rn, Rm Signed Multiply with Accumulate (32 x 32 + 64),
Brief description
Multiply with Accumulate, 32-bit result
Multiply and Subtract, 32-bit result
Move
Move Top
Move 16-bit constant
Move from special register to general register
Move from general register to special register
Multiply, 32-bit result
Move NOT
No Operation
Logical OR NOT
Logical OR
Pop registers from stack
Push registers onto stack
Reverse Bits
Reverse byte order in a word
Reverse byte order in each halfword
Reverse byte order in bottom halfword and sign
extend
Rotate Right
Rotate Right with Extend
Reverse Subtract
Subtract with Carry
Signed Bit Field Extract
Signed Divide
Send Event
64-bit result
...the world's most energy friendly microcontrollers
35
Flags
-
-
N,Z,C
-
N,Z,C
-
N,Z,C,V
N,Z
N,Z,C
-
N,Z,C
N,Z,C
-
-
-
-
-
-
N,Z,C
N,Z,C
N,Z,C,V
N,Z,C,V
-
-
-
-
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Page
Section 3.6.1 (p.
67)
Section 3.6.1 (p.
67)
Section 3.5.6 (p.
62)
Section 3.5.7 (p.
64)
Section 3.5.6 (p.
62)
Section 3.10.6 (p.
83)
Section 3.10.7 (p.
83)
Section 3.6.1 (p.
67)
Section 3.5.6 (p.
62)
Section 3.10.8 (p.
84)
Section 3.5.2 (p.
59)
Section 3.5.2 (p.
59)
Section 3.4.7 (p.
53)
Section 3.4.7 (p.
53)
Section 3.5.8 (p.
64)
Section 3.5.8 (p.
64)
Section 3.5.8 (p.
64)
Section 3.5.8 (p.
64)
Section 3.5.3 (p.
60)
Section 3.5.3 (p.
60)
Section 3.5.1 (p.
57)
Section 3.5.1 (p.
57)
Section 3.8.2 (p.
72)
Section 3.6.3 (p.
69)
Section 3.10.9 (p.
85)
Section 3.6.2 (p.
68)