EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 73

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

3.8.3.2 Operation
3.8.3.3 Restrictions
3.8.3.4 Condition flags
3.8.3.5 Examples
3.9 Branch and control instructions
2011-02-04 - d0002_Rev1.00
UXTextend{cond} {Rd}, Rm {, ROR #n}
where:
extend is one of:
cond
Rd
Rm
ROR #n is one of:
These instructions do the following:
1. Rotate the value from Rm right by 0, 8, 16 or 24 bits.
2. Extract bits from the resulting value:
Do not use SP and do not use PC.
These instructions do not affect the flags.
Table 3.11 (p. 73) shows the branch and control instructions:
Table 3.11. Branch and control instructions
Mnemonic
B
BL
BLX
• SXTB extracts bits[7:0] and sign extends to 32 bits.
• UXTB extracts bits[7:0] and zero extends to 32 bits.
• SXTH extracts bits[15:0] and sign extends to 32 bits.
• UXTH extracts bits[15:0] and zero extends to 32 bits.
SXTH
UXTB
B Extends an 8#bit value to a 32#bit value.
H Extends a 16#bit value to a 32#bit value.
is an optional condition code, see Section 3.3.7 (p. 43) .
is the destination register.
is the register holding the value to extend.
ROR #8
ROR #16 Value from Rm is rotated right 16 bits.
ROR #24 Value from Rm is rotated right 24 bits.
If ROR #n is omitted, no rotation is performed.
R4, R6, ROR #16
R3, R10
Brief description
Branch
Branch with Link
Branch indirect with Link
Value from Rm is rotated right 8 bits.
; Rotate R6 right by 16 bits, then obtain the lower
; halfword of the result and then sign extend to
; 32 bits and write the result to R4.
; Extract lowest byte of the value in R10 and zero
; extend it, and write the result to R3
See
Section 3.9.1 (p. 74)
Section 3.9.1 (p. 74)
Section 3.9.1 (p. 74)
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