EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 65

• Manufacturer Part Number: EFM32G200F64
• Description: MCU 32BIT 64KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F64

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

3.5.8.2 Operation
3.5.8.3 Restrictions
3.5.8.4 Condition flags
3.5.8.5 Examples
3.5.9 TST and TEQ
3.5.9.1 Syntax
2011-02-04 - d0002_Rev1.00
where:
op
cond is an optional condition code, see Section 3.3.7 (p. 43) .
Rd
Rn
Use these instructions to change endianness of data:
REV
REV16 converts 16#bit big#endian data into little#endian data or 16#bit little#endian data into
REVSH converts either:
Do not use SP and do not use PC.
These instructions do not change the flags.
Test bits and Test Equivalence.
TST{cond} Rn, Operand2
TEQ{cond} Rn, Operand2
where:
cond
Rn
Operand2 is a flexible second operand. See Section 3.3.3 (p. 38) for details of the options.
REV
REV16
REVSH
REVHS
RBIT
is any of:
REV
REV16 Reverse byte order in each halfword independently.
REVSH Reverse byte order in the bottom halfword, and sign extend to 32 bits.
RBIT
is the destination register.
is the register holding the operand.
converts 32#bit big#endian data into little#endian data or 32#bit little#endian data into
big#endian data.
big#endian data.
• 16#bit signed big#endian data into 32#bit signed little#endian data
• 16#bit signed little#endian data into 32#bit signed big#endian data.
R3, R7
R0, R0
R0, R5
R3, R7
R7, R8
is an optional condition code, see Section 3.3.7 (p. 43) .
is the register holding the first operand.
Reverse byte order in a word.
Reverse the bit order in a 32#bit word.
; Reverse byte order of value in R7 and write it to R3
; Reverse byte order of each 16-bit halfword in R0
; Reverse Signed Halfword
; Reverse with Higher or Same condition
; Reverse bit order of value in R8 and write the result to R7
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