EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 98

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

PS015308-0404
Note:
Note:
Timer Data Register—Low Byte
This Read Only register returns the Low byte of the current count value of the selected
timer. The Timer Data Register—Low Byte, detailed in Timer Data Register—Low Byte
(TMR0_DR_L = 0081h, TMR1_DR_L = 0084h, TMR2_DR_L = 0087h, TMR3_DR_L =
008Ah, TMR4_DR_L = 008Dh, or TMR5_DR_L = 0090h), can be read while the timer is
in operation. Reading the current count value does not affect timer operation. To read the
16-bit data of the current count value, {TMRx_DR_H[7:0], TMRx_DR_L[7:0]}, first read
the Timer Data Register—Low Byte and then read the Timer Data Register—High Byte.
The Timer Data Register—High Byte value is latched when a Read of the Timer Data
Register—Low Byte occurs.
Table 34. Timer Data Register—Low Byte
(TMR0_DR_L = 0081h, TMR1_DR_L = 0084h, TMR2_DR_L = 0087h,
TMR3_DR_L = 008Ah, TMR4_DR_L = 008Dh, or TMR5_DR_L = 0090h)
Timer Data Register—High Byte
This Read Only register returns the High byte of the current count value of the selected
timer. The Timer Data Register—High Byte, detailed in Timer Data Register—High Byte
(TMR0_DR_H = 0082h, TMR1_DR_H = 0085h, TMR2_DR_H = 0088h, TMR3_DR_H
= 008Bh, TMR4_DR_H = 008Eh, or TMR5_DR_H = 0091h), can be read while the timer
is in operation. Reading the current count value does not affect timer operation. To read
the 16-bit data of the current count value, {TMRx_DR_H[7:0], TMRx_DR_L[7:0]}, first
read the Timer Data Register—Low Byte and then read the Timer Data Register—High
Byte. The Timer Data Register—High Byte value is latched when a Read of the Timer
Data Register—Low Byte occurs.
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMRx_DR_L
The Timer Data registers and Timer Reload registers share the same address space.
The timer data registers and timer reload registers share the same address space.
Value
00h–FFh These bits represent the Low byte of the 2-byte timer data
P R E L I M I N A R Y
R
7
0
Description
value, {TMRx_DR_H[7:0], TMRx_DR_L[7:0]}. Bit 7 is bit 7
of the 16-bit timer data value. Bit 0 is bit 0 (lsb) of the 16-
bit timer data value.
R
6
0
R
5
0
R
4
0
R
3
0
Programmable Reload Timers
Product Specification
R
2
0
eZ80F92/eZ80F93
R
1
0
R
0
0
86