EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 21

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

Table 1. 100-Pin LQFP Pin Identification of the eZ80F92 Device (Continued)
PS015308-0404
Pin #
27
28
29
30
31
32
33
34
35
36
Symbol
ADDR22
ADDR23
CS0
CS1
CS2
CS3
V
V
DATA0
DATA1
DD
SS
Function
Address Bus
Address Bus
Chip Select 0
Chip Select 1
Chip Select 2
Chip Select 3
Power Supply
Ground
Data Bus
Data Bus
Signal Direction
Bidirectional
Bidirectional
Output, Active Low
Output, Active Low
Output, Active Low
Output, Active Low
Bidirectional
Bidirectional
P R E L I M I N A R Y
Description
Configured as an output in normal
operation. The address bus selects a
location in memory or I/O space to be read
or written. Configured as an input during
bus acknowledge cycles. Drives the Chip
Select/Wait State Generator block to
generate Chip Selects.
Configured as an output in normal
operation. The address bus selects a
location in memory or I/O space to be read
or written. Configured as an input during
bus acknowledge cycles. Drives the Chip
Select/Wait State Generator block to
generate Chip Selects.
CS0 Low indicates that an access is
occurring in the defined CS0 memory or I/
O address space.
CS1 Low indicates that an access is
occurring in the defined CS1 memory or I/
O address space.
CS2 Low indicates that an access is
occurring in the defined CS2 memory or I/
O address space.
CS3 Low indicates that an access is
occurring in the defined CS3 memory or I/
O address space.
Power Supply.
Ground.
The data bus transfers data to and from I/O
and memory devices. The eZ80Acclaim!
drives these lines only during Write cycles
when the CPU is the bus master.
The data bus transfers data to and from I/O
and memory devices. The CPU drives
these lines only during Write cycles when
the CPU is the bus master.
Product Specification
eZ80F92/eZ80F93
Architectural Overview
™
9