EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 233

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

Table 141. Op Code Map—Fourth Byte After 0DDh, 0CBh, and dd
PS015308-0404
Legend
First Operand
of Fourth
C
D
0
1
2
3
4
5
6
7
8
9
A
B
E
F
Nibble
Upper
Notes:
Byte
0
Lower Nibble of 4th Byte
d = 8-bit two’s-complement displacement.
4
1
0,(IX+d)
BIT
6
2
Second Operand
Mnemonic
3
4
5
RES 0,
RES 2,
RES 4,
RES 6,
SET 0,
SET 2,
SET 4,
SET 6,
P R E L I M I N A R Y
(IX+d)
(IX+d)
(IX+d)
BIT 0,
(IX+d)
BIT 2,
(IX+d)
BIT 4,
(IX+d)
BIT 6,
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
RLC
SLA
RL
6
Lower Nibble (Hex)
7
8
9
A
B
Product Specification
C
eZ80F92/eZ80F93
D
Op-Code Map
RES 1,
RES 3,
RES 5,
RES 7,
SET 1,
SET 3,
SET 5,
SET 7,
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
(IX+d)
BIT 1,
BIT 3,
BIT 5,
BIT 7,
RRC
SRA
SRL
RR
E
F
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