EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 41

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

Table 3. Register Map (Continued)
PS015308-0404
Address
(hex)
Universal Asynchronous Receiver/Transmitter 0 (UART0) Block
00C0
00C1
00C2
00C3
00C4
00C5
00C6
00C7
I
00C8
00C9
00CA
00CB
00CC
00CD
Notes:
2
C Block
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC registers are locked; Read/Write if RTC registers are unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After an
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
out reset, the Watch-Dog Timer Control register is reset to 20h.
RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
Mnemonic
UART0_RBR
UART0_THR
UART0_BRG_L
UART0_IER
UART0_BRG_H
UART0_IIR
UART0_FCTL
UART0_LCTL
UART0_MCTL
UART0_LSR
UART0_MSR
UART0_SPR
I2C_SAR
I2C_XSAR
I2C_DR
I2C_CTL
I2C_SR
I2C_CCR
I2C_SRR
Name
UART 0 Receive Buffer Register
UART 0 Transmit Holding Register
UART 0 Baud Rate Generator Register—
Low Byte
UART 0 Interrupt Enable Register
UART 0 Baud Rate Generator Register—
High Byte
UART 0 Interrupt Identification Register
UART 0 FIFO Control Register
UART 0 Line Control Register
UART 0 Modem Control Register
UART 0 Line Status Register
UART 0 Modem Status Register
UART 0 Scratch Pad Register
I
I
I
I
I
I
I
2
2
2
2
2
2
2
C Slave Address Register
C Extended Slave Address Register
C Data Register
C Control Register
C Status Register
C Clock Control Register
C Software Reset Register
P R E L I M I N A R Y
Reset
(hex)
XX
XX
XX
XX
02
00
00
01
00
00
00
60
00
00
00
00
00
F8
00
Product Specification
eZ80F92/eZ80F93
Access
CPU
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
W
R
R
R
R
R
Register Map
Page
121
122
124
125
155
156
156
158
159
161
162
114
114
112
115
113
116
117
118
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