EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 38

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

Table 3. Register Map (Continued)
PS015308-0404
Address
(hex)
Programmable Reload Counter/Timers (continued)
0087
0088
0089
008A
008B
008C
008D
008E
008F
0090
0091
0092
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC registers are locked; Read/Write if RTC registers are unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After an
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
out reset, the Watch-Dog Timer Control register is reset to 20h.
RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
Mnemonic
TMR2_DR_L
TMR2_RR_L
TMR2_DR_H
TMR2_RR_H
TMR3_CTL
TMR3_DR_L
TMR3_RR_L
TMR3_DR_H
TMR3_RR_H
TMR4_CTL
TMR4_DR_L
TMR4_RR_L
TMR4_DR_H
TMR4_RR_H
TMR5_CTL
TMR5_DR_L
TMR5_RR_L
TMR5_DR_H
TMR5_RR_H
TMR_ISS
Name
Timer 2 Data Register—Low Byte
Timer 2 Reload Register—Low Byte
Timer 2 Data Register—High Byte
Timer 2 Reload Register—High Byte
Timer 3 Control Register
Timer 3 Data Register—Low Byte
Timer 3 Reload Register—Low Byte
Timer 3 Data Register—High Byte
Timer 3 Reload Register—High Byte
Timer 4 Control Register
Timer 4 Data Register—Low Byte
Timer 4 Reload Register—Low Byte
Timer 4 Data Register—High Byte
Timer 4 Reload Register—High Byte
Timer 5 Control Register
Timer 5 Data Register—Low Byte
Timer 5 Reload Register—Low Byte
Timer 5 Data Register—High Byte
Timer 5 Reload Register—High Byte
Timer Input Source Select Register
P R E L I M I N A R Y
Reset
(hex)
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
Product Specification
eZ80F92/eZ80F93
Access
CPU
R/W
R/W
R/W
R/W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
Register Map
Page
86
87
87
88
85
86
87
87
88
85
86
87
87
88
85
86
87
87
88
89
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