EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 69

MODULE EZ80F92 512K 20MHZ

EZ80F920120MOD

Manufacturer Part Number
EZ80F920120MOD
Description
MODULE EZ80F92 512K 20MHZ
Manufacturer
Zilog

Specifications of EZ80F920120MOD

Module/board Type
Development Module
Processor Series
EZ80F92x
Core
eZ80
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
1 MB
Interface Type
Cable
Maximum Clock Frequency
20 MHz
Operating Supply Voltage
0 V to 3.3 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
0 C
For Use With/related Products
eZ80F92
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3157
EZ80F920120MOD
PS015308-0404
Intel Bus Mode
Figure 10.Example: Z80 Bus Mode Write Timing
Chip selects configured for Intel bus mode modify the CPU bus signals to duplicate a four-
state memory transfer similar to that found on Intel-style microcontrollers. The bus signals
and eZ80F92 device pins are mapped as illustrated in Figure 11. In Intel bus mode, the
user can select either multiplexed or nonmultiplexed address and data buses. In nonmulti-
plexed operation, the address and data buses are separate. In multiplexed operation, the
lower byte of the address, ADDR[7:0], also appears on the data bus, DATA[7:0], during
State T1 of the Intel bus mode cycle. During multiplexed operation, the lower byte of the
address bus also appears on the address bus in addition to the data bus.
System Clock
ADDR[23:0]
DATA[7:0]
or IORQ
MREQ
WAIT
CSx
WR
RD
T1
P R E L I M I N A R Y
T2
T
CLK
T3
Chip Selects and Wait States
Product Specification
eZ80F92/eZ80F93
57

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