EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 61
EZ80F920120MOD
Manufacturer Part Number
EZ80F920120MOD
Description
MODULE EZ80F92 512K 20MHZ
Manufacturer
Zilog
Datasheets
1.EZ80F920120MOD.pdf
(269 pages)
2.EZ80F920120MOD.pdf
(4 pages)
3.EZ80F920120MOD.pdf
(2 pages)
Specifications of EZ80F920120MOD
Module/board Type
Development Module
Processor Series
EZ80F92x
Core
eZ80
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
1 MB
Interface Type
Cable
Maximum Clock Frequency
20 MHz
Operating Supply Voltage
0 V to 3.3 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
0 C
For Use With/related Products
eZ80F92
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3157
EZ80F920120MOD
EZ80F920120MOD
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Table 12. Vectored Interrupt Operation (Continued)
PS015308-0404
Memory
Mode
Z80 Mode
ADL Mode
Nonmaskable Interrupts
ADL
Bit
0
1
An active Low input on the NMI pin generates an interrupt request to the CPU. This non-
maskable interrupt is always serviced by the CPU regardless of the state of the Interrupt
Enable flags (IEF1 and IEF2). The nonmaskable interrupt is prioritized higher than all
maskable interrupts. The response of the CPU to a nonmaskable interrupt is described in
detail in the eZ80 CPU User Manual (UM0077).
MADL
Bit
1
1
Operation
Read the LSB of the interrupt vector placed on the internal vectored
interrupt bus, IVECT[7:0], bus by the interrupting peripheral.
•
•
•
•
•
•
•
•
•
•
Read the LSB of the interrupt vector placed on the internal vectored
interrupt bus, IVECT [7:0], by the interrupting peripheral.
•
•
•
•
•
•
•
•
•
•
IEF1
IEF2
The Starting Program Counter is effectively {MBASE, PC[15:0]}
Push the 2-byte return address, PC[15:0], onto the SPL stack
Push a 00h byte onto the SPL stack to indicate an interrupt from Z80
mode (because ADL = 0)
Set the ADL mode bit to 1
The interrupt vector address is located at {00h, I[7:0], IVECT[7:0]}
PC[15:0]
The ending Program Counter is {00h, PC[15:0]}
The interrupt service routine must end with RETI.L
IEF1
IEF2
The Starting Program Counter is PC[23:0]
Push the 3-byte return address, PC[23:0], onto the SPL stack
Push a 01h byte onto the SPL stack to indicate a restart from ADL mode
(because ADL = 1)
The ADL mode bit remains set to 1
The interrupt vector address is located at {00h, I[7:0], IVECT[7:0]}
PC[15:0]
The ending Program Counter is {00h, PC[15:0]}
The interrupt service routine must end with RETI.L
0
0
0
0
P R E L I M I N A R Y
({00h, I[7:0], IVECT[7:0]})
({00h, I[7:0], IVECT[7:0]})
Product Specification
eZ80F92/eZ80F93
Interrupt Controller
49
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