EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 194

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

PS015308-0404
Note:
Instruction Store 4:0 Registers
The ZDI Instruction Store registers are located in the ZDI Register Write Only address
space. They can be written with instruction data for direct execution by the CPU. When
the ZDI_IS0 register is written, the eZ80F92 device exits the ZDI BREAK state and exe-
cutes a single instruction. The Op Codes and operands for the instruction come from these
Instruction Store registers. The Instruction Store Register 0 is the first byte fetched, fol-
lowed by Instruction Store registers 1, 2, 3, and 4, as necessary. Only the bytes the proces-
sor requires to execute the instruction must be stored in these registers. Some CPU
instructions, when combined with the MEMORY mode suffixes (.SIS, .SIL, .LIS, or
.LIL), require 6 bytes to operate. These 6-byte instructions cannot be executed directly
using the ZDI Instruction Store registers. See Instruction Store 4:0 Registers.
Table 102. Instruction Store 4:0 Registers
Bit
Reset
CPU Access
Note: X = Undefined; W = Write.
Bit
Position
[7:0]
ZDI_IS4,
ZDI_IS3,
ZDI_IS2,
ZDI_IS1, or
ZDI_IS0
and ZDI_IS0 = 25h in the ZDI Register Write Only Address Space)
(ZDI_IS4 = 21h, ZDI_IS3 = 22h, ZDI_IS2 = 23h, ZDI_IS1 = 24h,
The Instruction Store 0 register is located at a higher ZDI address than the other
Instruction Store registers. This feature allows the use of the ZDI auto-address
increment function to load and execute a multibyte instruction with a single data
stream from the ZDI master. Execution of the instruction commences with writing
the most recent byte to ZDI_IS0.
Value Description
00h–
FFh
W
P R E L I M I N A R Y
X
7
These registers contain the Op Codes and operands for
immediate execution by the CPU following a Write to
ZDI_IS0. The ZDI_IS0 register contains the first Op Code
of the instruction. The remaining ZDI_ISx registers
contain any additional Op Codes or operand dates
required for execution of the required instruction.
W
6
X
W
X
5
W
X
4
W
X
3
Product Specification
W
X
ZiLOG Debug Interface
2
eZ80F92/eZ80F93
W
X
1
W
X
0
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