EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 203

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

Table 111. OCI Pins
PS015308-0404
Symbol
TCK
TMS
TDI
TDO
TRIGOUT
OCI Interface
Name
Clock.
Test Mode Select
Data In
Data Out
Trigger Output
be accessed via the clock (TCK) and data (TDI) pins. See the ZiLOG Debug Interface sec-
tion on page 163 for more information on ZDI.
There are five dedicated pins on the eZ80F92 device for the OCI interface. Four pins—
TCK, TMS, TDI, and TDO—are required for IEEE Standard 1149.1-compliant JTAG
ports. The TRIGOUT pin provides additional testability features. These five OCI pins are
described in OCI Pins
Type
Input
Input
Input
(OCI enabled)
I/O
(OCI disabled)
Output
Output
.
P R E L I M I N A R Y
Description
Asynchronous to the primary CPU system clock.
The TCK period must be at least twice the system
clock period. During RESET, this pin is sampled to
select either OCI or ZDI DEBUG modes. If Low
during RESET, the OCI is enabled. If High during
RESET, the OCI is powered down and ZDI DEBUG
mode is enabled. When ZDI DEBUG mode is active,
this pin is the ZDI clock. On-chip pull-up ensures a
default value of 1 (High).
This serial test mode input controls JTAG mode
selection. On-chip pull-up ensures a default value of
1 (High). The TMS signal is sampled on the rising
edge of the TCK signal.
Serial test data input. On-chip pull-up ensures a
default value of 1 (High). This pin is input-only when
the OCI is enabled. The input data is sampled on the
rising edge of the TCK signal.
When the OCI is disabled, this pin functions as the
ZDA (ZDI Data) I/O pin.
The output data changes on the falling edge of the
TCK signal.
Generates an active High trigger pulse when valid
OCI trigger events occur. Output is tristate when no
data is being driven out.
Product Specification
On-Chip Instrumentation
eZ80F92/eZ80F93
191