EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 263

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

IORQ—see Input/Output Request
IR_RxD modulation signal 13, 127–131
IR_TxD modulation signal 13, 127, 130,–131
IrDA Encoder/Decoder 13, 39, 130–131
IrDA specifications 126
IrDA standard 126
IrDA transceiver 130
IrDA Transmit Data 13
IrDA—see Infrared Data Association 126
IRQ—see Interrupt Request
IRQ_EN bit 81, 85, 136, 139
ISR—see Interrupt Service Routine
IVECT—see interrupt vector address
J
Jitter, Infrared Encoder/Decoder 130
Joint Test Action Group
JTAG—see Joint Test Action Group
L
least-significant bit 86–87, 107, 147–148, 150, 153,
least-significant byte 48–49, 87, 161, 178
level-sensitive interrupt 45
Level-Triggered Interrupts 44
Line break detection 106
Loopback Testing, Infrared Encoder/Decoder 130
low-byte vector 47
Low-Power Modes 37
LSB—see least-significant byte
PS015308-0404
159, 165
baud rates 126
and ZDI clock input 12, 22, 164, 190–191, 243
interface 190
mode select input 12, 22, 191, 243
mode selection 191
Test Clock 12
Test Data In 12, 22, 164, 191, 243
Test Data Out 12, 22, 191, 243
Test Mode 12
Test Trigger Output 12
input 130
modes 43
P R E L I M I N A R Y
lsb—see least-significant bit
M
maskable interrupt 38, 47
Mass Erase operation 200, 205–206, 208–210
Mass Erase Violation 206
Master In, Slave Out 19, 133, 135
MASTER mode 134, 142, 152–153, 157–162
MASTER mode, SPI 135
Master Out, Slave In 19, 133, 135
MASTER RECEIVE mode 142, 150
MASTER TRANSMIT mode 142, 147
MASTER_EN bit 135
Memory and I/O Chip Selects 50
Memory Chip Select Example 51
Memory Chip Select Operation 50
Memory Chip Select Priority 51
Memory Request 10–11, 22, 50, 55–56, 58–59, 62,
memory space 50, 52
Memory Write 200
MISO—see Master In, Slave Out
Mode Fault error flag 133, 135, 140
Modem status signal 14, 16
MODF—see Mode Fault error flag
MOSI—see Master Out, Slave In
most-significant bit 87–88, 107, 108, 133, 144, 156,
most-significant byte 88
Motorola Bus Mode 65
Motorola-compatible 55
MREQ—see Memory Request
msb—see most significant bit
MSB—see most-significant byte
Multibyte I/O Write (Row Programming) 199
multimaster conflict 135, 140
235–236
159, 165, 168, 207
sources 47
vectors 48
Start bit 147–149, 151–152, 154, 157–158, 160
Stop bit 148, 149, 151–152, 154, 157–158, 160
Hold Time 236
Product Specification
eZ80F92/eZ80F93
Index
251