EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 260

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

Index
Numerics
100-pin LQFP package 4 , 20
16-bit clock divisor value 112 , 137
16-bit divisor count 112 , 137
20 MHz Primary Crystal Oscillator Operation 223
32 KHz Real-Time Clock Crystal Oscillator Opera -
A
AAK —see I
A bsolute Maximum Ratings 22 6
A C Characteristics 233
ACK —see Acknowledge
Acknowledge 144 , 148 – 152 , 154 , 159 – 160
a ddress bus 5 – 9, 48 , 52 , 54 – 5 9 , 62 , 65 – 6 6 , 69 – 7 0 ,
Addressing 154
ADL Memory mode 183 , 18 7
a larm condition 91 , 104 , 105
alarm f lag 104
Arbitration 146
Architectural Overview 1
asynchronous serial data 13 , 15
B
Baud Rate Generator 111
BCD—see binary-coded-decimal operatio n
b inary-coded-decimal operation 90 , 92 – 105
bit generation 106
Block Diagram 2
Boundary-Scan Architecture 190
break detection 106 , 115
break point trigger functions 190
BRG Control Registers 112
Bus Acknowledge 11 , 22 , 54 , 170 , 181 , 187 , 242
PS015308-0404
tion 224
92 , 170 , 181 , 187
2 4-bit 25
F unctional Description 136
p in 54 , 181
2
C Acknowledge bit
P R E L I M I N A R Y
Bus Arbitration Overview 142
Bus Enable bit 156 , 158
Bus Mode Controller 55
bus mode state 55 – 5 6 , 59 , 63 , 67 , 7 3
b us modes 55, 68, 71
Bus Request 1 1 , 22 , 54 , 170, 181, 187
BUSACK—see Bus Acknowledge
BUSREQ—see Bus Request
Byte Format 144
C
Change Log 247
Characteristics, Electrical
Chip Select 0 9
Chip Select 1 9
Chip Select 2 9
Chip Select 3 9
Chip Select Registers 69
Chip Select x Bus Mode Control Register 71
Chip Select x Control Register 70
Chip Select x Lower Bound Register 69
Chip Select x Upper Bound Register 70
Chip Select/Wait State Generator block 5, 6, 7, 8, 9
Chip Selects and Wait States 50
Chip Selects During Bus Request/Bus Acknowl-
Clear To Send 14, 16,122,124
clock divisor value, 16-bit 112, 137
clock initialization circuitry 190
Clock Peripheral Power-Down Registers 38
Clock Phase 133–135, 139
Clock Polarity 134–135, 139
Clock Synchronization 145
Clocking Overview 142
Complex triggers 190
CONTINUOUS mode 78, 80–83, 85, 87–88
edge Cycles 54
During ZDI Debug Mode 170
Absolute Maximum Ratings 226
Delta Status Change of 125
Product Specification
eZ80F92/eZ80F93
Index
248