EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 216

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

PS015308-0404
Flash Frequency Divider Register
The 8-bit frequency divider allows programming to Flash over a range of system clock fre-
quencies. Flash can programmed with system clock frequencies ranging from 154 KHz
through 50 MHz. The Flash controller requires an input clock with a period that falls
within the range of 5.1 6.5 µs. The period of the Flash controller clock is set via the Flash
Frequency Divider register. Writes to this register are allowed only after it is unlocked via
the FLASH_KEY register. The Frequency Divider register value required vs. system clock
frequency is detailed in Flash Frequency Divider Values. System clock frequencies outside
of the ranges shown in this table are not supported.
Table 118. Flash Frequency Divider Values
Table 119. Flash Frequency Divider Register
System Clock
Frequency
154–196 KHz
308–392 KHz
462–588 KHz
616 KHz–50 MHz
Note: *The CEILING function rounds fractional values up to the next
Bit
Reset
CPU Access
Note: R/W = Read/Write, R = Read Only. *Key sequence required to enable Writes
Bit
Position
[7:0]
FLASH_FDIV
whole number, e.g., CEILING(3.01) is 4.
Value Description
01h–
FFh
(FLASH_FDIV = 00F9h)
R/W*
Divider value for generating the required 5.1–6.5 s Flash
controller clock period.
Flash Frequency Divider Value
1
2
3
CEILING[System Clock Frequency
(MHz) x 5.1 ( s)]*
P R E L I M I N A R Y
7
0
R/W*
6
0
R/W*
5
0
R/W*
4
0
R/W*
3
0
Product Specification
R/W*
2
0
eZ80F92/eZ80F93
R/W*
1
0
Flash Memory
R/W
0
1
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