EZ80F920120MOD Zilog, EZ80F920120MOD Datasheet - Page 129

• Manufacturer Part Number: EZ80F920120MOD
• Description: MODULE EZ80F92 512K 20MHZ
• Manufacturer: Zilog

Specifications of EZ80F920120MOD

• Module/board Type: Development Module
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 1 MB
• Interface Type: Cable
• Maximum Clock Frequency: 20 MHz
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: 0 C
• For Use With/related Products: eZ80F92
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3157; EZ80F920120MOD

PS015308-0404
Table 59. UART Interrupt Status Codes (Continued)
UART FIFO Control Register
This register is used to monitor trigger levels, clear FIFO pointers, and enable or disable
the FIFO. The UARTx_FCTL registers share the same I/O addresses as the UARTx_IIR
registers. See UART FIFO Control Registers (UART0_FCTL = 00C2h, UART1_FCTL =
Table 60. UART FIFO Control Registers
(UART0_FCTL = 00C2h, UART1_FCTL = 00D2h)
00D2h).
INSTS
Value
001
000
Bit
Reset
CPU Access
Note: W = Write only.
Bit
Position
[7:6]
TRIG
[5:3]
Note: *Receive FIFO is not enabled during
Priority
Fifth
Lowest
Value
00
01
10
11
000
Description
Receive FIFO trigger level set to 1. Receive data interrupt is
generated when there is 1 byte in the FIFO. Valid only if FIFO
is enabled.
Receive FIFO trigger level set to 4. Receive data interrupt is
generated when there are 4 bytes in the FIFO. Valid only if
FIFO is enabled.
Receive FIFO trigger level set to 8. Receive data interrupt is
generated when there are 8 bytes in the FIFO. Valid only if
FIFO is enabled.
Receive FIFO trigger level set to 14. Receive data interrupt is
generated when there are 14 bytes in the FIFO. Valid only if
FIFO is enabled.
Reserved.
W
Interrupt Type
Transmit Buffer Empty
Modem Status
P R E L I M I N A R Y
7
0
W
6
0
MULTIDROP
W
5
0
Universal Asynchronous Receiver/Transmitter
W
4
0
mode.
W
3
0
Product Specification
W
2
0
eZ80F92/eZ80F93
W
1
0
W
0
0
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